Add ENC28J60 to custom WP7607 board

wsialex · January 18, 2019, 10:30am

I’m trying to add a ENC28J60 to a wp7607 custom board connected over SPI. I have added the driver to the defcon.

I have also added a sub-node for the enc28j60 to the mdm9607-wp76xx.dtsi starting on row 272

before

&spi_1 {
	status = "ok";
};

After

&spi_1 {
	status = "ok";
	

	enc28j60: ethernet@0 {
		#address-cells = <1>;
		#size-cells = <1>;
		compatible = "microchip,enc28j60";
		spi-max-frequency = <20000000>;
		reg = <0>;
		interrupt-parent = <&WHAT_SHOULD_BE_HERE?>;
		interrupts = <AND_HERE?>;
	};
};

When building and flashing without interrupt-parent and interrupt my dmesg contains

[    1.008694] enc28j60 spi1.0: enc28j60 Ethernet driver 1.01 loaded
[    1.010180] modprobe (121) used greatest stack depth: 6424 bytes left
[    1.012350] enc28j60 spi1.0: enc28j60 chip not found
[    1.012385] enc28j60: probe of spi1.0 failed with error -5

Found this on google https://www.kernel.org/doc/Documentation/devicetree/bindings/net/microchip%2Cenc28j60.txt where it says I need interrupt-parent and interrupt for the driver to get interrupts properly.

I can’t find any examples or documentation on how to specify this. Any help is appreciated.

Jay · January 25, 2019, 6:27pm

Hi,

How is ENC28J60 is powered and wired to WP7607?

Which WP7607 pin do you have selected for the interrupt?
Are you powering the ENC28J60 via a regulator controlled by one WP7606 GPIO pin?
Are you managing the reset pin of ENC28J60 via a GPIO?
…

Could you share schematics (only the parts related to WP76 and ENC28J60 should be enough)?

Also, ENC28J60 driver in kernel 3.18 is not compatible with device tree (required match table for device tree support is missing).
Support has been added with the following commit:
https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?id=2dd355a007e44960ec049c75920ddb6778fec9ee
Do you have backported kernel driver code (enc28j60.c) from a newer kernel?

BR
Jay

wsialex · January 31, 2019, 10:23am

hi,

I solved it. I used the driver included in the kernel. Mostly i had HW issues. I added a subnode in the tlmm_pinmux node for interrupt and reset pin:

&soc{ 
	tlmm_pinmux: pinctrl@1000000 {
		enc28j60_int_default: enc28j60_int_default {
			mux {
				pins = "gpio76";
				function = "gpio";
			};
			config {
				pins = "gpio76";
				drive-strength = <16>; /* in mA */
				bias-pull-up;
			};
		};

		enc28j60_rst_default: enc28j60_rst_default {
			mux {
				pins = "gpio58";
				function = "gpio";
			};
			config {
				pins = "gpio58";
				drive-strength = <16>; /* in mA */
				output-high;
			};
		};
	};
};

Then added to spi_1 node:

&spi_1 {
 	status = "ok";
	eth0: enc28j60@0 {
		#address-cells = <1>;
		#size-cells = <1>;
		compatible = "microchip,enc28j60";
		spi-max-frequency = <5000000>;
		reg = <0>;
		interrupt-parent = <&tlmm_pinmux>;
		interrupts = <76 2>; /*IRQ_TYPE_EDGE_FALLING*/
		pinctrl-names = "enc28j60_int_default";
		pinctrl-0 = <&enc28j60_int_default>;
		enc28j60,duplex_mode=<1>;
	};
 };

Added my own flag for full_duplex mode in the driver (enc28j60,duplex_mode) as the driver starts in half_duplex and there is no way to configure this (wierd?).

I however had troubles with the boot configuration of the reset pin. It should be set to output high but at boot it was set low which made the enc28j60 be in constant reset. I think i have it configured now to boot as output high, but I needed to configure it with at+wiocfg=8,4,1,1 i think. I don’t understand this, maybe the at configuration overrides DTS config at boot or something?

The gpio numberings are the qualcomm pin numbers which don’t corresponds to wp7607 pin numbers. found it in this forum post GPIO Interrupts on WP7702 Module

This should at least be documented somewhere more clearly.

the device tree incompatibility you mentioned does not seem to matter.

Jay · February 1, 2019, 2:35pm

Hi,

You’re right, the documentation for Linux customization (especially MDM kernel/BSP details) is quite poor.

For GPIO numbers matching (Sierra WP7xxx versus Qualcomm MDM9xxx), you can extract the structure from source code by using this command line at the root of your “yocto” folder:

awk 'BEGIN { in_struct=0; } /^.*ext_gpio_wp\[\]=.*/ { in_struct=1; } /^};/ && in_struct { print; in_struct=0; } in_struct == 1 { print; }' kernel/drivers/gpio/gpiolib-sysfs.c

Result obtained from WP76xx release 10.1.1 (SWI9X07Y_02.18.06.00):

WP76xx	MDM9607
2	38
4	30
7	16
8	58
13	76
21	8
22	9
23	10
24	11
25	51
28	45
29	46
30	47
31	48
32	77
33	78
35	37
42	79

BR
Jay

Gokulnath · March 2, 2020, 12:40pm

Hi. I am trying to add ENCX24j600 driver to WP7702. Could you help me out?

Jay · March 5, 2020, 1:06pm

As encx24j600 driver is not provided with kernel 3.18 then you need first to backport it from a newer kernel version (e.g. 4.14 or newer).
Regarding platform settings in device tree, it should be very similar to what has been done here for ENC28J60.
Just replace the word “enc28j60” by “encx24j600”.
Example:
compatible = "microchip,encx24j600";

Gokulnath · March 7, 2020, 7:11am

Hi Jay ,
We have built the driver and flashed to WP 7702. Now we are able to see eth0 under when ifconfig issued, but it is always down.

Jan 6 06:42:13 swi-mdm9x28-wp user.info kernel: [ 52.290863] encx24j600 spi1.0 (unnamed net_device) (uninitialized): link down
Jan 6 06:42:13 swi-mdm9x28-wp user.info kernel: [ 52.309781] encx24j600: Hw is initialized
Jan 6 06:42:13 swi-mdm9x28-wp user.info kernel: [ 52.309956] encx24j600 ECON1: 0000
Jan 6 06:42:13 swi-mdm9x28-wp user.info kernel: [ 52.310719] encx24j600 ECON2: CB00
Jan 6 06:42:13 swi-mdm9x28-wp user.info kernel: [ 52.310736] encx24j600 ERXFCON: 0049
Jan 6 06:42:13 swi-mdm9x28-wp user.info kernel: [ 52.310908] encx24j600 ESTAT: 5A00
Jan 6 06:42:13 swi-mdm9x28-wp user.info kernel: [ 52.311075] encx24j600 EIR: 0700
Jan 6 06:42:13 swi-mdm9x28-wp user.info kernel: [ 52.311086] encx24j600 EIDLED: CB21
Jan 6 06:42:13 swi-mdm9x28-wp user.info kernel: [ 52.311096] encx24j600 MACON1: 0009
Jan 6 06:42:13 swi-mdm9x28-wp user.info kernel: [ 52.311105] encx24j600 MACON2: 40B2
Jan 6 06:42:13 swi-mdm9x28-wp user.info kernel: [ 52.311114] encx24j600 MAIPG: 0C12
Jan 6 06:42:13 swi-mdm9x28-wp user.info kernel: [ 52.311375] encx24j600 MACLCON: 370F
Jan 6 06:42:13 swi-mdm9x28-wp user.info kernel: [ 52.311540] encx24j600 MABBIPG: 0012
Jan 6 06:42:13 swi-mdm9x28-wp user.info kernel: [ 52.311552] encx24j600 PHCON1: 1200
Jan 6 06:42:13 swi-mdm9x28-wp user.info kernel: [ 52.314624] encx24j600 PHCON2: 0002
Jan 6 06:42:13 swi-mdm9x28-wp user.info kernel: [ 52.314637] encx24j600 PHANA: 05E1
Jan 6 06:42:13 swi-mdm9x28-wp user.info kernel: [ 52.315964] encx24j600 PHANLPA: 0001
Jan 6 06:42:13 swi-mdm9x28-wp user.info kernel: [ 52.317277] encx24j600 PHANE: 0000
Jan 6 06:42:13 swi-mdm9x28-wp user.info kernel: [ 52.318588] encx24j600 PHSTAT1: 7809
Jan 6 06:42:13 swi-mdm9x28-wp user.info kernel: [ 52.319902] encx24j600 PHSTAT2: 0000
Jan 6 06:42:13 swi-mdm9x28-wp user.info kernel: [ 52.322651] encx24j600 PHSTAT3: 0000
Jan 6 06:42:13 swi-mdm9x28-wp user.info kernel: [ 52.324594] encx24j600 spi1.0 eth0: Silicon rev ID: 0x01
Jan 6 06:42:13 swi-mdm9x28-wp user.info kernel: [ 52.324612] encx24j600 spi1.0 eth0: MAC address 00:00:ec:c7:aa:a2
Jan 6 06:42:13 swi-mdm9x28-wp user.info kernel: [ 52.427889] encx24j600 spi1.0 eth0: link down
Jan 6 06:42:13 swi-mdm9x28-wp user.info kernel: [ 52.433488] encx24j600: Hw is initialized
Jan 6 06:42:13 swi-mdm9x28-wp user.info kernel: [ 52.433671] encx24j600 ECON1: 0000
Jan 6 06:42:13 swi-mdm9x28-wp user.info kernel: [ 52.433931] encx24j600 ECON2: CB00
Jan 6 06:42:13 swi-mdm9x28-wp user.info kernel: [ 52.433942] encx24j600 ERXFCON: 0049
Jan 6 06:42:13 swi-mdm9x28-wp user.info kernel: [ 52.434106] encx24j600 ESTAT: 5A00
Jan 6 06:42:13 swi-mdm9x28-wp user.info kernel: [ 52.434270] encx24j600 EIR: 0700
Jan 6 06:42:13 swi-mdm9x28-wp user.info kernel: [ 52.434281] encx24j600 EIDLED: CB21
Jan 6 06:42:13 swi-mdm9x28-wp user.info kernel: [ 52.434291] encx24j600 MACON1: 0009
Jan 6 06:42:13 swi-mdm9x28-wp user.info kernel: [ 52.434300] encx24j600 MACON2: 40B2
Jan 6 06:42:13 swi-mdm9x28-wp user.info kernel: [ 52.434308] encx24j600 MAIPG: 0C12
Jan 6 06:42:13 swi-mdm9x28-wp user.info kernel: [ 52.434317] encx24j600 MACLCON: 370F
Jan 6 06:42:13 swi-mdm9x28-wp user.info kernel: [ 52.434326] encx24j600 MABBIPG: 0012
Jan 6 06:42:13 swi-mdm9x28-wp user.info kernel: [ 52.434337] encx24j600 PHCON1: 1200
Jan 6 06:42:13 swi-mdm9x28-wp user.info kernel: [ 52.441426] encx24j600 PHCON2: 0002
Jan 6 06:42:13 swi-mdm9x28-wp user.info kernel: [ 52.441446] encx24j600 PHANA: 05E1
Jan 6 06:42:13 swi-mdm9x28-wp user.info kernel: [ 52.442879] encx24j600 PHANLPA: 0001
Jan 6 06:42:13 swi-mdm9x28-wp user.info kernel: [ 52.444271] encx24j600 PHANE: 0000
Jan 6 06:42:13 swi-mdm9x28-wp user.info kernel: [ 52.445600] encx24j600 PHSTAT1: 7809
Jan 6 06:42:13 swi-mdm9x28-wp user.info kernel: [ 52.451750] encx24j600 PHSTAT2: 0000
Jan 6 06:42:13 swi-mdm9x28-wp user.info kernel: [ 52.453159] encx24j600 PHSTAT3: 0040

What has to be done next to make it alive and start the communication?
root@swi-mdm9x28-wp:~# /sbin/udhcpc -R -b -i eth0
udhcpc: started, v1.27.2
udhcpc: sending discover
udhcpc: sending discover
udhcpc: sending discover
udhcpc: no lease, forking to background

Jay · March 9, 2020, 9:16am

Which GPIO pin on WP7702 module is connected to the interrupt pin of encx24j600 chip?
How the reset pin of encx24j600 chip is controlled? (update: there is no reset pin on encx24j600 )
Also, could you show us your devicetree node for encx24j600?

Gokulnath · March 12, 2020, 5:25am

We are using the this device tree node.

&spi_1 {
status = “ok”;
eth0: encx24j600@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = “microchip,encx24j600”;
spi-max-frequency = <5000000>;
reg = <0>;
interrupt-parent = <&tlmm_pinmux>;
interrupts = <79 2>;
pinctrl-names = “encx24j600_int_default”;
pinctrl-0 = <&encx24j600_int_default>;
encx24j600,duplex_mode=<1>;
};
};

encx24j600_int_default: encx24j600_int_default {
mux {
pins = “gpio79”;
function = “gpio”;
};
config {
pins = “gpio79”;
drive-strength = <16>;
bias-pull-up;
};
};

We are using GPIO 42 on the WP module which is equivalent to GPIO 79 on MDM?

Whenever we issue udchp command we are getting TX timed out and RX error.

[ 116.178911] encx24j600 spi1.0 eth0: RX Error 736f480a
[ 116.183708] encx24j600 spi1.0 eth0: RX Error 736f480a
[ 116.188596] encx24j600 spi1.0 eth0: RX Error 736f480a
[ 116.194230] encx24j600 spi1.0 eth0: RX Error 736f480a
[ 116.198886] encx24j600 spi1.0 eth0: RX Error 736f480a
[ 116.205887] encx24j600 spi1.0 eth0: RX Error 736f480a
[ 116.211026] encx24j600 spi1.0 eth0: RX Error 736f480a
[ 116.215676] encx24j600 spi1.0 eth0: RX Error 736f480a
[ 116.223810] encx24j600 spi1.0 eth0: RX Error 736f480a
[ 116.228535] encx24j600 spi1.0 eth0: RX Error 736f480a
[ 116.234039] encx24j600 spi1.0 eth0: RX Error 736f480a
[ 116.238698] encx24j600 spi1.0 eth0: RX Error 736f480a
[ 116.244161] encx24j600 spi1.0 eth0: RX Error 736f480a
[ 116.249581] encx24j600 spi1.0 eth0: RX Error 736f480a
[ 116.258695] encx24j600 spi1.0 eth0: RX Error 736f480a
[ 116.263569] encx24j600 spi1.0 eth0: RX Error 736f480a
[ 116.269919] encx24j600 spi1.0 eth0: RX Error 736f480a
[ 116.275238] encx24j600 spi1.0 eth0: RX Error 736f480a
[ 116.279897] encx24j600 spi1.0 eth0: RX Error 736f480a
[ 116.288186] encx24j600 spi1.0 eth0: RX Error 736f480a
[ 116.293026] encx24j600 spi1.0 eth0: RX Error 736f480a
[ 116.297880] encx24j600 spi1.0 eth0: RX Error 736f480a
[ 121.441008] sierra_startup_monitor
[ 129.050978] encx24j600 spi1.0 eth0: TX timeout at -17095, latency 989
[ 135.599320] encx24j600 spi1.0 eth0: RX Error 736f480a
[ 135.604106] encx24j600 spi1.0 eth0: RX Error 736f480a
[ 159.050150] encx24j600 spi1.0 eth0: TX timeout at -14095, latency 965
[A [ 169.050969] encx24j600 spi1.0 eth0: TX timeout at -13095, latency 1000
[ 179.050968] encx24j600 spi1.0 eth0: TX timeout at -12095, latency 1000
[ 189.051003] encx24j600 spi1.0 eth0: TX timeout at -11095, latency 1000
[ 199.050967] encx24j600 spi1.0 eth0: TX timeout at -10095, latency 624
[ 219.050302] encx24j600 spi1.0 eth0: TX timeout at -8095, latency 741
[ 234.050975] encx24j600 spi1.0 eth0: TX timeout at -6595, latency 603
[ 269.050985] encx24j600 spi1.0 eth0: TX timeout at -3095, latency 765
[ 294.050969] encx24j600 spi1.0 eth0: TX timeout at -595, latency 760
[ 324.010979] encx24j600 spi1.0 eth0: TX timeout at 2401, latency 834
[ 334.010984] encx24j600 spi1.0 eth0: TX timeout at 3401, latency 1000
[ 354.010995] encx24j600 spi1.0 eth0: TX timeout at 5401, latency 914
[ 364.010978] encx24j600 spi1.0 eth0: TX timeout at 6401, latency 648
[ 384.011002] encx24j600 spi1.0 eth0: TX timeout at 8401, latency 993
[ 394.011000] encx24j600 spi1.0 eth0: TX timeout at 9401, latency 1000
[ 409.010302] encx24j600 spi1.0 eth0: TX timeout at 10901, latency 572
[ 419.010984] encx24j600 spi1.0 eth0: TX timeout at 11901, latency 696
[ 439.010978] encx24j600 spi1.0 eth0: TX timeout at 13901, latency 652
[ 449.010978] encx24j600 spi1.0 eth0: TX timeout at 14901, latency 1000

Jay · June 9, 2020, 3:53pm

Hi,

Did you succeed to run encx24j600 with WP7702?

If not then please share your schematics (showing pull-up resistor(s) and level shifters).

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WP76xx	MDM9607
2	38
4	30
7	16
8	58
13	76
21	8
22	9
23	10
24	11
25	51
28	45
29	46
30	47
31	48
32	77
33	78
35	37
42	79

WP76xx	MDM9607
2	38
4	30
7	16
8	58
13	76
21	8
22	9
23	10
24	11
25	51
28	45
29	46
30	47
31	48
32	77
33	78
35	37
42	79

Add ENC28J60 to custom WP7607 board

Related topics

WP76xx	MDM9607
2	38
4	30
7	16
8	58
13	76
21	8
22	9
23	10
24	11
25	51
28	45
29	46
30	47
31	48
32	77
33	78
35	37
42	79